The perturbation field never reached the mask ALU — document the seam, fix two defects - #1051
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… fix two defects Audit of the StreamDto / PerturbationDto / BusDto path between p64 and cognitive-shader-driver. Finding: an adapter/transport seam, not an ALU chain. PerturbationDto.energy (the dense field, canonically 4096) is dropped at the seam; only top_k survives and collapses to a min..max ColumnWindow - a control-plane heuristic, not a mask. p64 is the mask surface and is DTO-blind. Design intent recovered: the 64x64 field was the COCA codebook LUT (12-bit -> 6+6), SPO 2^3 as its 8x amortization (same address, different reading - proto-ClassView), CE64's 3x8 = 24 SPO bits as the surviving fossil. No codebook<->cell mapping exists in code today; the wire is fully torn with both ends live. The idea itself migrated UP into the token seam (tesseract-paperless -> #1017 token receipt -> DeepNSM-v2 on the 256:256 rail, #798): p64's modern role is a working-set ALU (<=4096 ACTIVE relations), not the lexicon. Code fixes, behaviour-preserving on canonical inputs: - dto.rs doc drift: 'PerturbationDto IS f64[4096]' corrected twice (field is Vec<f32>, from_energy_f32 accepts arbitrary lengths - documented). - busdto_to_binary16k aliased any index >= 16384 onto a foreign bit via modulo. A hard assert was tried FIRST and refuted by the corner-corpus test (u16::MAX is a pinned legal transport value, lossless via qualia[9]) - correct semantics is skip, never alias: out-of-plane sets NO bit, a documented loss in the same class as energy <= SUPPORT_ENERGY supporters. Anti-aliasing + plane-edge tests added (the old code recovered a phantom top_k index 1 no producer emitted). The same wrap in ingest_codebook_indices is documented, not changed (lab-only gRPC/serve surface must not be panicable by a caller-supplied index). - The two energy thresholds are now named constants with cross-referencing docs: SCAN_WORTHY_ENERGY = 0.01 (worth scanning) vs SUPPORT_ENERGY = 0.0 (worth recording as support) - distinct roles, not drift. Board: entry E-THE-PERTURBATION-FIELD-NEVER-REACHED-THE-MASK-ALU-1 (+ index row) and ISS-PERTURBATION-P64-ADDRESS-IDENTITY-UNPROVEN with the Q1 mapping candidates (row-major / Morton / permutation) and the working-set reframing, same commit per the double-entry rule. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HKHLL6NTnRr1XGvKFA1j2L
…usdto_to_binary16k The inserted const landed between the cfg attribute and the function it gated, so the default-features build lost the gate and failed on BusDto. Both items now carry their own cfg. Verified with the default-features clippy -D warnings (the invocation CI uses) AND the with-engine test suite - the gate that missed this locally was, once again, checking only the feature set I had just been working in. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HKHLL6NTnRr1XGvKFA1j2L
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…- gated yes Three measured legs align: perturbation energy is similarity-shaped (u8-distance-derived accumulation), 2Z is the exactly-uniform LUT-over-field axis (today's four-readings entry), and helix24 wins on index / loses on angle - the losing axis is unused by an energy register. Bonus: the engine's own Option-B tiling plan already carves the 4096x4096 table into 64x64 blocks - the p64 geometry is the engine's tiling unit. Gated on (a) the arctanh domain proof for the accumulated energy, (b) the address-identity issue, (c) the zero-copy law (carrier or codec, never a second store). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HKHLL6NTnRr1XGvKFA1j2L
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August 26, 2026 09:52
…eam-defects # Conflicts: # .claude/board/entries/README.md
…ttractor PROBE-ENERGY-ARCTANH-DOMAIN (new thinking-engine example, run against the real ThinkingEngine::cycle): sum-normalisation makes energy a probability distribution (P1: 8 tables x 32 cycles, max <= 1.0, |sum-1| <= 8.34e-7); diffuse fields stay finite (P3: worst max 0.0209); the funnel attractor reaches EXACTLY 1.0 (P2: f32 bits 0x3F800000, one atanh-inf cell) - the boundary is the engine's fixed point, not an outlier. P4 pins the clamp ceilings: 2Z = 14.509 rho at eps 1e-6, 21.416 rho at 1e-9 (8-bit bin 0.057/0.084 rho). Verdict in the entry: winner excluded from the z-register or clamped at documented depth. Board addendum 2 also records the three-gears separation (Morton = address, Fisher-2Z = metric, p64 = ALU - orthogonal duties, never competitors), the binding guard that the metric hypothesis is gate 2 and must not appear to solve Q1, the A/B/C permutation sabotage design, the dynamic-comma placement (local metric modulation, only after A/B/C), and the bodyhelix.tsx lineage (q2: 400k surfels, golden-ruler 4M triangles from the 80k-FMA anatomy ontology - the architecture's first working proof). ISSUES entry extended with the second gate. Also in this commit: merge of main (post #1050) with the entries-index conflict resolved by keeping both rows. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HKHLL6NTnRr1XGvKFA1j2L
…t that missed the previous commit Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HKHLL6NTnRr1XGvKFA1j2L
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…masks, both KILL scales All three codex findings were valid, and a fourth surfaced while fixing them. None was a bug in the code under test; every one was a defect in the probe's FIXTURE: P1 the eval timed NarsTruth::revision (f32, contract-side) where the plan defines it as NarsTables lookup + CausalEdge64 revision. Disclosing the substitution did not make it the promised measurement. Probe MOVED to lance-graph-planner, where causal-edge is reachable, and now times NarsTables::revise + CausalEdge64:: forward: 34.7 ns/step (28,818 steps/ms). P1 the mask fixture was Bits(Vec<u64>) — a heap alloc inside every timed intersection — while impl EvidenceMask for [u64; N] already ships (revision.rs:70) and IS the p64 shape ([u64;64] = 4096 bits). Both are now timed and the delta reported: 61.5 ns alloc-free vs 73.4 ns allocating (~16%). P2 the KILL gate ran at 2,449 chains where the plan pre-registers 10^5. Both scales now run at one candidate width; it fires at NEITHER (10^5: 13.88 ms scan vs 0.007 ms decision; 2,449: 0.340 ms). Crossover ~53 chains. + self-caught: dense_mask(rng, 1) sets NO bits (x % 1 == 0), so the frontier decision was scored against an empty live set. all_ones() is now its own constructor; dense_mask asserts one_in >= 2. Net: MASK dominates by 1.77x, NOT the 3.8x v1 reported. The direction survives (a 64x64 tile is aimed at the half that costs) but the margin is under half the first claim, so the ALU case is materially weaker than v1 said; BUY stands at >10x the 1.36 ms oracle arm. Records are append-only: plan §3b kept and superseded by §3c with the reason; STATUS_BOARD D-DCR-0 superseded in place; EPIPHANIES prepend E-EVERY-DEFECT-IN-A-MEASUREMENT-WAS-IN-ITS-FIXTURE-NOT-ITS-CODE-1 (23888 -> 23935 lines, verified non-truncating). Gates: planner 370/370, my example clippy -D warnings clean, fmt clean. NOTE: workspace --all-targets clippy is red on probe_r2il_* examples from #1051 — pre-existing, untouched here, and rust-test.yml documents that a workspace -D warnings step would be red.
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…s bus; retract the DTO-crate option and the r2il probe
After reading .claude/v3 in full (README, VISION, primer,
INTEGRATION-PLAN, ENTROPY-MILESTONES): StreamDto / PerturbationDto /
BusDto / ThoughtStruct are the bus of the ALU chain ladybug-rs ->
thinking-engine -> P64 -> cognitive-shader-driver -> SoA (primer section
3, VISION section 6, E-DTO-LADDER-OWNERSHIP-SPLIT, W4 / D-V3-W4a). The
contract already carries their zero-dep shader-side twins
(cognitive_shader::{ShaderDispatch, ShaderResonance, ShaderBus,
ShaderCrystal}); engine_bridge.rs maps the two ladders rung by rung.
cognitive-shader-driver is the ALU; stockfish-rs is the reference design
for the 64x64 field; masking + SIMD make the ALU a reusable thinking-
compiler driver. The genuinely open work on the chain (PR #1051's
transport-not-field-ALU finding) belongs to the alpha-reason-witness
lineage addendum, not to this plan.
Plan section 6.3 and 1b corrected; the earlier "driver vs small DTO
crate" and the ogar-r2il round-trip probe are retracted in place.
Board: EPIPHANIES E-THE-DTO-LADDER-IS-THE-ALU-BUS-AND-WAS-ALREADY-RULED-1
(with the read-the-primer-first fence); PR_ARC correction line;
SUPERSESSION-INDEX regenerated.
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01PFnYKqw6d7TTiB9cT8eFdK
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Audit of
StreamDto/PerturbationDto/BusDtobetween p64 andcognitive-shader-driver— board entry + ISSUES gate + two small code fixes, behaviour-preserving on canonical inputs.The finding
The three DTOs form an adapter/transport seam, not an ALU chain:
{7, 42, 900}scans rows 7..901 — field algebra collapsed to a one-dimensional bounding box. Meanwhile p64 IS the mask surface ([u64;64]/[[u64;64];8],StyleParams{layer_mask, combine, contra}) and is DTO-blind.Design intent recovered, and where the idea went
The 4096 equality is a broken wire, not coincidence: the 64×64 field was the COCA codebook LUT (12-bit → 6+6), SPO 2³ its 8× amortization (same address, different reading — proto-ClassView), and CE64's 3×8 = 24 SPO bits (v2 layout bits 0..23) are the surviving fossil. No
codebook_id ↔ (row,col)mapping exists in code today — the wire is fully torn with both ends live.The idea itself migrated up into the token seam (
tesseract-paperless→ #1017's versioned tokenization receipt → DeepNSM-v2 on the 256:256 rail, #798 breaking the 4096 ceiling; 18,559 real surface forms, 65,536 addresses, Alice used 7,675). p64's modern role is a working-set ALU — ≤ 4096 active relations on the 64×64 mask field, not the lexicon. The forward question, recorded in the board entry: where between intake → token receipt → DeepNSM-v2 does a small-enough active set first arise to justify the mask-native ALU?Gate filed:
ISS-PERTURBATION-P64-ADDRESS-IDENTITY-UNPROVEN— no lowering without the address proof (Q1: row-majorid>>6,id&63vs Morton 12→6+6 vs permutation; a row-major cast is bijective and tests green even if the truth was Morton, while spatially scrambling the field). Probe design: CONTROL (today's window) / EXPERIMENT (proven mask → p64 combine/contra/style) / SABOTAGE (permute the addressing — same result kills the ALU hypothesis).Code fixes
dto.rsdoc drift — claimedPerturbationDto IS f64[4096]twice; the field isVec<f32>(wrong scalar AND shape),from_energy_f32accepts arbitrary lengths. Corrected, behaviour untouched.busdto_to_binary16k—% width_bitsaliased any index ≥ 16384 onto a foreign bit. A hardassert!was tried first and refuted by the existing corner-corpus test (u16::MAXis a pinned legal transport value, lossless viaqualia[9]). Correct semantics: skip, never alias — out-of-plane sets NO bit, a documented loss in the same class asenergy ≤ SUPPORT_ENERGYsupporters. Anti-aliasing + plane-edge tests added; the old code recovered a phantomtop_kindex1no producer ever emitted. The same wrap iningest_codebook_indicesis documented, not changed (lab-only gRPC/serve — a caller-supplied index must not panic the server).SCAN_WORTHY_ENERGY = 0.01(worth scanning) vsSUPPORT_ENERGY = 0.0(worth recording as support), cross-referencing docs: distinct roles, not drift.One follow-up fix in-branch: the inserted const initially swallowed the
with-enginecfg offbusdto_to_binary16k, breaking the default-features build — caught by running the default-features clippy (the invocation CI uses) before pushing the PR, both items now carry their own gate.Gates
cargo test -p cognitive-shader-driver(default): all suites green, 107 lib tests.--features with-engine: all green incl. the 8 busdto bridge tests (2 new). Default-featuresclippy --all-targets -- -D warnings: 0 errors.thinking-enginevia its own manifest: check clean (docs-only change there).Generated by Claude Code