Allow using the custom wide integer instructions

[elle-j]

Description

Allows resolc to target our new RISC-V vendor extension, which makes i256 a machine type held in its own registers: each 256-bit operation selects to a single instruction instead of a chain of four 64-bit limbs, and addmod, mulmod, exp and signextend become emitted intrinsics instead of stdlib.ll routines.

The extension is available via the now-updated LLVM submodule, using our fork (currently kvpanch/vec_ext_custom_inst @ 355e253).

Note

CLI flag:

A CLI flag (--wide-instructions) and JSON input (settings.polkavm.wideInstructions) are implemented as part of this change to make the feature more easily measurable with and without the custom instructions enabled during development.

(With the flag on, compilation fails at the PolkaVM linker, since this does not include a polkavm update including the decoding. Everything up to the ELF object runs: the intrinsics reach the IR, the stdlib.ll bodies are gone from the optimized module, and the object disassembles to real revive.* instructions.)

Follow-up note: newyork optimizer narrowing

The newyork IR pipeline currently narrows aggressively because a wide operation used to be a four-limb chain. With the extension, narrowing to a scalar vs keeping a value in a 256-bit register likely needs the cost/benefit calculations to be remeasured.