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[ARM] Support FPGA, fixed IRQ mapping - #290

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gratian merged 4 commits into
ni:nilrt/master/6.18from
chaitu236:dev/cvadrevu/fpgaperipheral
Aug 25, 2026
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[ARM] Support FPGA, fixed IRQ mapping#290
gratian merged 4 commits into
ni:nilrt/master/6.18from
chaitu236:dev/cvadrevu/fpgaperipheral

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@chaitu236 chaitu236 commented Aug 24, 2026

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Support FPGA programming and enable fixed IRQ mapping.

WI: AB#3990488

Testing

  • Built BSI, safemode on ARM.
  • Boot tested on cRIO-9068, cRIO-9066.
  • FPGA can be programmed on cRIO-9068, cRIO-9066.
  • Verified network and serial console are accessible after FPGA is programmed on cRIO-9068.
  • Verified network is accessible after FPGA is programmed on cRIO-9066.
  • Verified fixed IRQ mappings work on cRIO-9068 by installing ni-crio-driver-zynq-dkms, running an IRQ test LV project and verifying irq count increases with grep atomiczynq /proc/interrupts.

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chaitu236 marked this pull request as ready for review August 24, 2026 17:33
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chaitu236 requested a review from a team August 24, 2026 17:33
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chaitu236 force-pushed the dev/cvadrevu/fpgaperipheral branch 2 times, most recently from 65d0d56 to 04b1bad Compare August 24, 2026 20:59
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v3: Added Assisted-by tags. Retained original sign off tags from dcf0b05

The fpgaperipheral driver only binds to devices with the
"fpgaperipheral" compatible. Replacing its node with the Zynq devcfg
node prevents the driver from probing and breaks FPGA reconfiguration
notifications for dependent peripherals.

Restore the fpgaperipheral node and disable the inherited devcfg and
FPGA region nodes so that only one driver can own the device
configuration register range.

Fixes: 74561fd ("ARM: dts: ni-zynq: Drop obsolete bindings")

Assisted-by: Copilot:GPT-5.6-Sol
Signed-off-by: Chaitanya Vadrevu <chaitanya.vadrevu@emerson.com>
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chaitu236 force-pushed the dev/cvadrevu/fpgaperipheral branch from 04b1bad to 6e82fcd Compare August 24, 2026 22:01
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v4: Fix checkpatch for 'Assisted-by' tags.

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Looks OK overall, just a couple of nitpicks.

Comment thread drivers/irqchip/irq-gic.c
Comment thread drivers/irqchip/irq-gic.c
Comment thread drivers/tty/serial/8250/8250_ni.c
Comment thread drivers/tty/serial/8250/8250_ni.c
Some NI Zynq drivers depend on Linux IRQ numbers matching the
corresponding GIC hardware interrupt numbers. The dynamically allocated
GIC domain does not preserve that historical numbering contract.

Add an NI Zynq-specific option that creates a legacy domain for the
primary GIC and pre-associates GIC interrupts starting at 16 with the
same Linux IRQ numbers. Fail initialization if the required descriptor
range cannot be reserved or the identity mappings cannot be established.

Retain the GIC firmware node and existing translation callback so
device-tree interrupt specifications continue to work. Also retain the
allocation and free callbacks required for current SMP SGI setup.
Secondary GICs continue using the normal linear domain.

Enable the option in nati_zynq_defconfig.

Assisted-by: Copilot:GPT-5.6-Sol
Signed-off-by: Chaitanya Vadrevu <chaitanya.vadrevu@emerson.com>
macb_close() disconnects the PHY through phylink and clears
net_device::phydev. The FPGA notifier subsequently accesses phydev to
stop the PHY state machine and release its interrupt, causing a NULL
pointer dereference when FPGA programming begins.

The FPGA-up path similarly accesses phydev before macb_open() reconnects
it.

Remove the redundant direct PHY operations from both paths.
macb_close() and macb_open() already manage the PHY lifecycle through
phylink.

Assisted-by: Copilot:GPT-5.6-Sol
Signed-off-by: Chaitanya Vadrevu <chaitanya.vadrevu@emerson.com>
Suspend device-tree NI 16550 UARTs before FPGA programming and resume
them after successful programming. This reinitializes FPGA-backed UARTs,
including the serial console, after the FPGA fabric is reconfigured.

After suspending a port, replace its register accessors with no-op
callbacks to prevent concurrent console or TTY operations from accessing
unavailable FPGA MMIO and locking up the system. Restore the normal
accessors before resuming the port.

Leave ports suspended when programming fails and unregister the FPGA
notifier when removing the device.

Signed-off-by: Jaeden Amero <jaeden.amero@ni.com>
Signed-off-by: Xander Huff <xander.huff@ni.com>
Signed-off-by: Brad Mouring <brad.mouring@ni.com>
Signed-off-by: Gratian Crisan <gratian.crisan@ni.com>
[cvadrevu: reworked from commit dcf0b05 ("8250: Handle FPGA reprogramming")]
Assisted-by: Copilot:GPT-5.6-Sol
Signed-off-by: Chaitanya Vadrevu <chaitanya.vadrevu@emerson.com>
@chaitu236
chaitu236 force-pushed the dev/cvadrevu/fpgaperipheral branch from 6e82fcd to 8895496 Compare August 25, 2026 20:25
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chaitu236 requested a review from gratian August 25, 2026 21:23
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v5: Address review feedback

@gratian
gratian merged commit 58ae4e3 into ni:nilrt/master/6.18 Aug 25, 2026
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@chaitu236
chaitu236 deleted the dev/cvadrevu/fpgaperipheral branch August 25, 2026 22:10
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2 participants