ORC-2216: [C++] Add RVV bit-unpacking for RLEv2

[zhanchangbao-sanechips]

Add RVV acceleration for RLEv2 bit unpacking

The scalar RLEv2 decoder is a bottleneck when we're reading wide integer columns. Since RVV hardware is becoming much more common, this patch adds a vectorized path to unpack bits in parallel.

Changes

• Add c++/src/BpackingRvv.{hh,cc}: Covers bit widths 3..32, 40, 48 and 56 using gather-based and strided-load vector paths; falls back to the scalar implementation for widths 1, 2, 64 and for bit-level misalignment / buffer boundaries.
• c++/src/Dispatch.hh: add DispatchLevel::RVV and the corresponding isSupported check.
• c++/src/RleDecoderV2.cc: register the RVV implementation in the dispatch table when ORC_HAVE_RUNTIME_RVV is defined.
• c++/src/CMakeLists.txt and c++/test/CMakeLists.txt: compile the new source under RVV builds and reuse TestRleVectorDecoder.cc for vector decoder test coverage.

Test

1. Build with -DBUILD_ENABLE_RVV=ON on a RISC-V machine(SG2044) with Gcc support RVV(I used gcc 14.2.1).
2. use ORC_USER_SIMD_LEVEL=RVV ./orc-test and ORC_USER_SIMD_LEVEL=NONE ./orc-test，all unittest pass.
3. I write a small standalone benchmark(bench_rvv.cc) to compare scalar and RVV decoding speeds. Switch paths via ORC_USER_SIMD_LEVEL=NONE|RVV. but i dont left bench_rvv.cc at the repo.

performance

bits	NONE_Mvals/s	RVV_Mvals/s	speedup
1	80.8	78.5	0.97
2	106.2	102.4	0.96
3	114.1	160.8	1.41
4	217.9	235.4	1.08
5	96.2	240.1	2.50
6	79.9	245.3	3.07
7	75.4	246.7	3.27
8	237.3	276.0	1.16
9	70.8	175.0	2.47
10	69.5	124.3	1.79
12	60.7	110.7	1.82
14	52.8	102.1	1.93
16	184.6	238.1	1.29
17	55.4	173.9	3.14
20	48.2	173.9	3.61
24	156.3	176.9	1.13
26	41.3	135.0	3.27
28	35.2	135.6	3.85
30	32.3	135.9	4.21
32	155.2	162.0	1.04
40	139.7	146.6	1.05
48	126.8	134.7	1.06
56	108.3	100.1	0.92
64	111.0	111.3	1.00

Screenshot

unittest

performance

bench_rvv.cc