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atomic: multi-backend framework + builtin + API rename - #19867

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atomic: multi-backend framework + builtin + API rename#19867
zhangyu-duck wants to merge 10 commits into
apache:masterfrom
zhangyu-duck:pr2-atomic-backend

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@zhangyu-duck

@zhangyu-duck zhangyu-duck commented Aug 16, 2026 •
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Summary

Rework the atomic implementation to support multiple selectable backends via Kconfig:

  • LIBC_ATOMIC_TOOLCHAIN - compiler builtins (default, lock-free)
  • LIBC_ATOMIC_ARCH - arch-native atomic instructions (lock-free)
  • LIBC_ATOMIC_HWSPINLOCK - hardware spinlock wrapping critical section (cross-core)
  • LIBC_ATOMIC_IRQ - IRQ disable wrapping critical section (single-core fallback)

Switch <nuttx/atomic.h> to call toolchain builtin atomic functions directly (__atomic_* / __c11_atomic_* / _Interlocked*), avoiding conflicts with third-party C/C++ standard libraries.

Rename atomic_fetch_xxx -> atomic_xxx (e.g., atomic_fetch_add -> atomic_add) because the atomic_fetch_xxx naming is reserved by the C/C++ standard and conflicts with standard library declarations.

Use _Atomic qualifier for atomic_t typedef when supported, with a __Atomic(t) wrapper for clang/C++ compatibility.

Breaking change

This is a breaking API change. A companion PR in the apps tree renames call sites (atomic_fetch_add -> atomic_add, etc.).

depends-on: apache/nuttx-apps/pull/3733

Stacked PR chain

Depends on #19866. This is PR 2 of 3:

Test

CI testbuild across ARM/RISC-V/SIM targets.

@zhangyu-duck zhangyu-duck mentioned this pull request Aug 16, 2026
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@github-actions github-actions Bot added Arch: arm Issues related to ARM (32-bit) architecture Arch: avr Issues related to all AVR(8-bit or 32-bit) architectures Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: sparc Issues related to the SPARC architecture Arch: xtensa Issues related to the Xtensa architecture Area: OS Components OS Components issues Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces. labels Aug 16, 2026
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github-actions Bot commented Aug 16, 2026 •
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MemBrowse Memory Report

arduino-mega2560

  • flash: .text -3,116 B (-4.6%, 64,240 B / 262,144 B, total: 25% used)

mirtoo

  • kseg0_progmem: .text -668 B (-1.0%, 66,808 B / 131,072 B, total: 51% used)

rx65n-rsk2mb

  • ROM: .text -880 B (-1.0%, 86,416 B / 2,097,152 B, total: 4% used)

s698pm-dkit

@github-actions github-actions Bot added the Arch: renesas Issues related to the Renesas chips label Aug 17, 2026
@zhangyu-duck zhangyu-duck reopened this Aug 18, 2026
@zhangyu-duck
zhangyu-duck force-pushed the pr2-atomic-backend branch 4 times, most recently from 4175fc5 to 469409e Compare August 18, 2026 11:40
@github-actions github-actions Bot added Area: Drivers Drivers issues and removed Area: OS Components OS Components issues labels Aug 18, 2026
@xiaoxiang781216 xiaoxiang781216 mentioned this pull request Aug 19, 2026
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@github-actions github-actions Bot added Area: Bluetooth Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: simulator Issues related to the SIMulator Board: arm and removed Area: Drivers Drivers issues labels Aug 19, 2026
@zhangyu-duck zhangyu-duck changed the title atomic: multi-backend implementation (IRQ + hwspinlock + arch) atomic: multi-backend framework + builtin + API rename Aug 19, 2026
@zhangyu-duck zhangyu-duck mentioned this pull request Aug 19, 2026
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@zhangyu-duck
zhangyu-duck marked this pull request as ready for review August 19, 2026 06:35
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github-actions Bot commented Aug 19, 2026

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🔗 Cross-repo PR dependencies

The read-only Build run reported the following dependent PR(s) and fetched head SHA(s):

CI run: https://github.com/apache/nuttx/actions/runs/32223697536

@jerpelea

jerpelea commented Aug 19, 2026

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breaking change commits and PR must me preceded by !
ex:
! nuttx/atomic: use toolchain builtin atomic function

@zhangyuduck
nuttx/libc: arch_atomic.c uses IRQ switching, no SMP support
c14be62 
The atomic implementation of machine/arch_atomic.c is achieved by
switching interrupts. This version does not support SMP.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
arch/tricore: add arch atomic function
f00fd9f 
Tricore gcc does not support atomic interface but some users need to
use atomic operations, so support atomic function using tricore arch
instructions (__cmpAndSwap/__swap/__ld32).

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@github-actions

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🔗 Cross-repo PR dependencies

The read-only Build run reported the following dependent PR(s) and fetched head SHA(s):

CI run: https://github.com/apache/nuttx/actions/runs/32266949770

@zhangyuduck
nuttx/libc: refine the atomic related Kconfig
1c53803 
Refine the atomic Kconfig to support multiple backends:
LIBC_ATOMIC_TOOLCHAIN (compiler builtins), LIBC_ATOMIC_ARCH (arch
instructions), and LIBC_ATOMIC_IRQ (interrupt disable). Rename
arch_atomic.c to arch_atomic_irq.c since it supports the IRQ backend.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
libc/machine: split atomic into header, arch_atomic_irq.c, arch_atomi…
f3f779b 
…c64.c

Split the atomic implementation into three files:
- arch_atomic.h: Shared macros (STORE, LOAD, etc.) using atomic_lock()/
  atomic_unlock() abstraction
- arch_atomic_irq.c: 32-bit atomic functions using IRQ disable (conditional
  on CONFIG_LIBC_ATOMIC_IRQ via Make.defs)
- arch_atomic64.c: 64-bit atomic functions using spinlock (always compiled,
  multi-core safe). The __atomic_* functions are always provided (GCC
  runtime helpers), while nx_atomic_* functions are conditional on
  !CONFIG_LIBC_ATOMIC_TOOLCHAIN.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
nuttx/atomic: select LIBC_ATOMIC_IRQ for archs without atomic support
a784284 
Select LIBC_ATOMIC_IRQ at the architecture level (ARM7TDMI, ARM926EJS,
ARMv6M) for chips that do not support atomic operations natively. This
covers all ARM7TDMI, ARM926EJS, and Cortex-M0 based chips automatically.

Also select LIBC_ATOMIC_IRQ for specific non-ARM architectures (AVR,
RISC-V, SPARC, Xtensa) that lack atomic instruction support.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
nuttx: use unified interface in <nuttx/atomic.h>
4cf79fc 
Replace atomic_load with atomic_read in call sites to use the
unified interface defined in <nuttx/atomic.h>.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
nuttx/atomic: for builtin atomic, a wrapper is used to unify the names.
eeb836e 
1. for tasking, map __c11_atomic_xxx as tasking_atomic_xxx
2. for msvc, map  _Interlocked_xxx as msvc_atomic_xxx
3. if no special map, use gcc/clang as default as they are most widely used.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
nuttx/atomic: use toolchain builtin atomic function
d0ba0d0 
The reason for using builtin atomic is that in C++, when include <atomic> in <nuttx/atomic.h> easily conflicts with third-party function libraries. We wanted to completely separate the implementation of <nuttx/atomic.h>.

There are two points:
1. use builtin function directly.
2. Without the standard library implementation, need implement "atomic_fetch_xxx", leading conflicts with the standard library used by third-party programs, introducing redefinition issues and requiring name changes.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
nuttx/atomic: replace atomic_fetch_xxx with atomic_xxx just like zephyr
dd6857f 
Rename atomic_fetch_add/sub/or/and/xor to atomic_add/sub/or/and/xor
to avoid conflicts with the C/C++ standard library naming. The
atomic_fetch_xxx naming is reserved by the standard; keeping it causes
function name conflicts when source files indirectly include both
<nuttx/atomic.h> and <atomic>/<stdatomic.h>.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@zhangyuduck
nuttx/atomic.h: use _Atomic define atomic_t.
2aa1e74 
1. use _atomic as wrapper because if _Atomic empty, may affects the compilation of other files:

2. for clang builtin function, it donot accept param with keyword "_Atomic"

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
@github-actions

github-actions Bot commented Aug 21, 2026

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🔗 Cross-repo PR dependencies

The read-only Build run reported the following dependent PR(s) and fetched head SHA(s):

CI run: https://github.com/apache/nuttx/actions/runs/32450732020

@zhangyu-duck

zhangyu-duck commented Aug 21, 2026

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Hi everyone, I have a question.

The Build workflow supports fetching companion apps via depends-on, but the MemBrowse workflow doesn't seem to support this. Is there a way to enable it for MemBrowse as well? Now build process is Ok, Thanks!

@xiaoxiang781216

xiaoxiang781216 commented Aug 21, 2026

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Hi everyone, I have a question.

The Build workflow supports fetching companion apps via depends-on, but the MemBrowse workflow doesn't seem to support this. Is there a way to enable it for MemBrowse as well? Now build process is Ok, Thanks!

@zhangning21 could you look at this problem? before this issue get fixed, let's ignore it.

@xiaoxiang781216 xiaoxiang781216 added the breaking change This change requires a mitigation entry in the release notes. label Aug 21, 2026
@zhangning21

zhangning21 commented Aug 21, 2026

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Hi everyone, I have a question.
The Build workflow supports fetching companion apps via depends-on, but the MemBrowse workflow doesn't seem to support this. Is there a way to enable it for MemBrowse as well? Now build process is Ok, Thanks!

@zhangning21 could you look at this problem? before this issue get fixed, let's ignore it.

@xiaoxiang781216 @zhangyu-duck The Depends-On support was only added to build.yml (in the Fetch-Source job). membrowse-report.yml does its own source checkout and doesn't go through that logic, so it always builds against the apps default branch and never picks up the declared dependency.

I can add it there as well if that's wanted.

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Arch: arm Issues related to ARM (32-bit) architecture Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: avr Issues related to all AVR(8-bit or 32-bit) architectures Arch: renesas Issues related to the Renesas chips Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: simulator Issues related to the SIMulator Arch: sparc Issues related to the SPARC architecture Arch: xtensa Issues related to the Xtensa architecture Area: Bluetooth Board: arm breaking change This change requires a mitigation entry in the release notes. Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces.

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