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Command-line interface definition #5

Description

@rodrigomelo9

In this issue, I will summarize the currently supported sub-commands and their arguments. @mithro @kgugala @acomodi could you provide me feedback?

  • What about sub-commands and arguments names?
  • Need I split commands (imp) to have a more granular control?
  • Missing arguments that I haven't into account?

Please, add other users to the talk if needed, and feel free to ask any doubt.

For more details, the following is defined here.

Sub-commands

  • syn: Performs synthesis
  • pnr: Performs Place and Route
  • bit: Performs bitstream generation
  • all: Performs from synthesis to bitstream generation (runs together syn, imp and bit in one step)
  • pgm: Performs programming (when available).

Command-line arguments

Shared by all the sub-commands:

  • --project: basename for generated files.
  • -p, --part: name of the target FPGA part (something like 'hx8k-ct256)
  • -o, --outdir: location for generated files
  • --oci-engine: OCI engine internally employed (docker, podman)
  • --oci-volumes: volumes for the OCI engine. Can be specified multiple times.
  • --oci-work: working directory for the OCI engine

For syn (and all)

  • -t, --top: specify a top-level name
  • --param: specify top-level Generics/Parameters (as NAME VALUE). Can be specified multiple times.
  • --arch: specify a VHDL top-level Architecture
  • --define: specify [System] Verilog Defines (as DEFINE VALUE). Can be specified multiple times.
  • --include : specify [System] Verilog Include Paths. Can be specified multiple times.
  • --scf: a Synthesis Constraint Files (not yet implemented). Can be specified multiple times.
  • hdl: (positional, mandatory) a list of HDL files (which can be specified as FILE[,LIBRARY] in case of VHDL)

For imp (and all)

  • --pcf: a Physical Constraint Files (IO place). Can be specified multiple times.

Activity

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