+
+### Global Reset Register
+
+An MMIO or I/O port register and mask that can be written to that traps into FW to initiate an in-band reset and reconfigures the eSPI config space back to defaults. Any pending transactions are lost and controller is in fresh state.
+
+###
+
+### VWire Channel
+
+All interrupts come through a single GPE. The status register is read until no new VWIRE_AVAIL is set. The actual VWire event is described by an MMIO resource that is 16-bits long. The upper 8-bits is the Index and lower 8-bits is the data as described in the eSPI protocol specification.
+
+When a VWire event is read it will be removed from the FIFO. If events are not read until VWIRE_AVAIL is no longer set in the status, the interrupt and GPE should be triggered again.
+
+###
+
+### Peripheral Channel
+
+There can be multiple sub-channels exposed via a single peripheral channel. Each sub-channel must have a corresponding PCC table defining the channel details and the address of the MMIO region. Type 3 and Type 4 tables should be used for bi-directional packet based communication.
+
+The doorbell register when written will trigger a peripheral channel transfer of the data length specified by the Length field in the PCC Shared Memory Region.
+
+On systems where MMIO accesses automatically generate peripheral transactions the doorbell can be set to 0 and the Command register should point to the shared buffer command field indicating the bits to indicate command completion.
+
+##
+
+## Sample ACPI Definition for the eSPI PCC Device
+
+The sample separates the namespace device definition from the PCCT subspace records. PCC is exposed as independent subspaces, and the subspace ID is the index of each structure in the PCCT array. The addresses below are illustrative and must be replaced by the platform memory map.
+
+### Illustrative Address Map
+
+| Resource | Base Address | Length | Purpose |
+|----|----|----|----|
+| Channel-independent configuration | 0xFEDC0000 | 0x1000 | Read-only eSPI identification and channel capability/configuration registers. |
+| Global status register | 0xFEDC1000 | 0x4 | 32-bit controller status, including implementation-defined pending/available indications. |
+| Global reset register | 0xFEDC1004 | 0x4 | 32-bit reset control; this example uses bit 0 as the in-band eSPI reset request. |
+| Doorbell register | 0xFEDC1008 | 0x4 | Bit 0 rings the selected eSPI peripheral channel. |
+| Type 4 acknowledge register | 0xFEDC100C | 0x4 | Bit 0 acknowledges a platform notification on the Type 4 subspace. |
+| VWire FIFO register | 0xFEDC1010 | 0x4 | 32-bit read FIFO. Reading returns the next queued VWire event and removes it from the FIFO. |
+| PCC Type 3 shared memory | 0xFEDC2000 | 0x400 | 1024-byte extended master subspace for OS-initiated bidirectional peripheral traffic. |
+| PCC Type 4 shared memory | 0xFEDC2400 | 0x400 | 1024-byte extended slave subspace for platform-initiated bidirectional peripheral traffic. |
+
+### Sample SSDT Namespace Definition
+
+DefinitionBlock ("", "SSDT", 2, "OEMID", "ESPIPCC", 0x00000001)
+{
+ Scope (\\SB)
+ {
+ Device (ESPI)
+ {
+ Name (\_HID, "OEM0001")
+ Name (\_UID, Zero)
+ Name (\_DDN, "eSPI PCC Controller")
+ Name (\_STA, 0x0F)
+
+ Name (\_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadOnly, 0xFEDC0000, 0x00001000, CFG0)
+ Memory32Fixed (ReadWrite, 0xFEDC1000, 0x00000004, STS0)
+ Memory32Fixed (ReadWrite, 0xFEDC1004, 0x00000004, RST0)
+ Memory32Fixed (ReadWrite, 0xFEDC1008, 0x00000008, DBR0)
+ Memory32Fixed (ReadWrite, 0xFEDC1010, 0x00000004, VWF0)
+ })
+
+ OperationRegion (ECFG, SystemMemory, 0xFEDC0000, 0x1000)
+ OperationRegion (GCSR, SystemMemory, 0xFEDC1000, 0x0014)
+ Field (GCSR, DWordAcc, NoLock, Preserve)
+ {
+ GSTA, 32,
+ GRST, 1, Reserved, 31,
+ DB00, 1, Reserved, 31,
+ AK00, 1, Reserved, 31,
+ VWFR, 32 // VWire FIFO, offset 0x10
+ }
+
+ // Extended PCC shared-memory header: 16 bytes, followed by 1008-byte payload.
+ OperationRegion (PCC3, PCC, 0, 0x400) // Host -\> EC, Type 3
+ Field (PCC3, DWordAcc, NoLock, Preserve)
+ {
+ C3SG, 32, // Signature, offset 0x00
+ C3FL, 32, // Flags, offset 0x04
+ C3LN, 32, // Length, offset 0x08
+ C3CM, 32, // Command, offset 0x0C
+ C3DT, 8064 // Payload, offset 0x10, 1008 bytes
+ }
+
+ OperationRegion (PCC4, PCC, 1, 0x400) // EC -\> Host, Type 4
+ Field (PCC4, DWordAcc, NoLock, Preserve)
+ {
+ C4SG, 32, // Signature, offset 0x00
+ C4FL, 32, // Flags, offset 0x04
+ C4LN, 32, // Length, offset 0x08
+ C4CM, 32, // Command, offset 0x0C
+ C4DT, 8064 // Payload, offset 0x10, 1008 bytes
+ }
+
+ Method (ERST, 0, Serialized)
+ {
+ Store (One, GRST)
+ }
+ }
+ }
+}
+
+**Namespace notes:** **PCC3** references PCCT subspace ID 0 and **PCC4** references subspace ID 1. Each OperationRegion remains exactly **0x400 bytes**. The first **16 bytes** follow the Extended PCC shared-memory header layout: a 32-bit **Signature** at offset 0x00, 32-bit **Flags** at offset 0x04, 32-bit **Length** at offset 0x08, and 32-bit **Command** at offset 0x0C. The remaining **1008 bytes**, starting at offset 0x10, are available for the eSPI packet payload.
+
+### Sample PCCT Subspace Definitions
+
+The PCCT contains an ordered array of PCC subspace structures, with the array index becoming the PCC subspace ID. The following pseudo-definition shows the fields that platform firmware would emit for the two channels; exact C structure names depend on the firmware ACPI table library.
+
+PCCT.Header.Signature = 'PCCT'
+PCCT.Header.Revision = 2
+PCCT.Flags = 1 // Platform interrupt supported
+
+// Subspace ID 0: Extended PCC Master (Type 3)
+Type = 3
+Length = sizeof (TYPE3_SUBSPACE)
+PlatformInterrupt = \| Usage Name | +Usage Types | +Usage Description | +
|---|---|---|
| Current State | +NAry | +The most-recent state | +
| Cleared | +Sel | +State is uninitialized or recently reset/cleared. | +
| Failed | +Sel | +Failed to perform the most recent operation. (Note: HID-transport functionality is still clearly working) +Common for when the device is actually backed by another device that can experience failures |
+
| Expired | +Sel | +Expired (e.g. timer has completed) | +
| Signaled | +Sel | +Signaled (e.g. external interrupt raised) | +
| Running | +Sel | +Running (e.g. everything behaving normally) | +
| Usage Name | +Usage Types | +Usage Description | +
|---|---|---|
| Vendor Current State | +DV | +Opaque state-value meaningful only to the device vendor. +Typically used in conjunction with ‘Current State’ |
+
| Usage Name | +Usage Types | +Usage Description | +
|---|---|---|
| Year | +DV | +Standard UTC Gregorian calendar year. +Positive integers for AD and negative for BC. +0 is undefined in the Gregorian calendar. |
+
| Month | +DV | +Standard UTC Gregorian calendar month | +
| Day | +DV | +Standard UTC Gregorian calendar day of the month | +
| Usage Name | +Usage Types | +Usage Description | +
|---|---|---|
| Time Zone Offset From UTC | +DV | +Minutes local time is behind (-) or ahead (+) of UTC+00:00 +Offset = (localTime – UTC) e.g. EST timezone of UTC-05:00 is behind -300 minutes. |
+
| Daylight Savings Time Observed | +DF | +Indicates if DST is observed in current time zone | +
| Daylight Savings Time Active | +DF | +Indicates if time has been adjusted by system to apply DST. +Useful when the device is shared to coordinate applying/removing DST. |
+
| Usage Name | +Usage Types | +Usage Description | +
|---|---|---|
| System Wake Timer | +CA | +A configurable timer, capable of waking the system when in a low-power state. | +
| Timer Expiration: External Power | +DV | +Timer expiration when device is connected to external (i.e. AC/wall) power. | +
| Timer Expiration: Internal Power | +DV | +Timer expiration when device is connected to internal (i.e. DC/battery) power. | +
| Power Source Change Minimum Expiration | +DV | +Additional time the wake-timer must wait for, when the power-source changes (e.g. from external to internal) while the system is in Sx and the timer has already expired. +(e.g. System enters Sx while on external-power with internal-power timer expired. While in Sx, power-source changes to internal, must wait for additional period before signaling wake.) |
+
| Usage Name | +Usage Types | +Usage Description | +
|---|---|---|
| Lowest System Wakeable Power State | +NAry | +Indicates the lowest power state the system can enter and still be signaled awake. | +
| S1 | +Sel | +Standard ACPI S1 sleep state | +
| S2 | +Sel | +Standard ACPI S2 sleep state | +
| S3 | +Sel | +Standard ACPI S3 sleep state | +
| S4 | +Sel | +Standard ACPI S4 (Hibernate) sleep state. +System context saved, hardware mostly off |
+
| S5 | +Sel | +Standard ACPI S5 (soft off) sleep state. +System context lost, requires full reboot. |
+
| Report Type | ++ | Report Id | +Description | +
|---|---|---|---|
| Feature | ++ | 1 | +Describes the lowest system power state this wake timer can wake the system. | +
| Output | ++ | 1 | +Wait timer configuration. +Setting a null-value clears the configuration, stopping any active countdown. +Must request corresponding Input report to validate configuration was applied successfully, as underlying hardware may fail |
+
| Input | ++ | 1 | +Current wake-timer configuration. +Must be requested explicitly by system. Will NOT be sent as Interrupt. +Examine ‘Current State’ to determine if configuration was successfully applied. +
|
+
| Output | +3 | +Sets the RTC. +This device supports a resolution of 1 millisecond. +Must request corresponding Input report to validate configuration was applied successfully, as underlying hardware may fail. |
+
|---|---|---|
| Input | +3 | +Retrieves the current RTC time. +Examine ‘Current State’ to determine if previously set time was successfully applied. +
|
+